1. Field of the Invention
This invention relates to the field of bipolar random access memories.
2. Prior Art
The prior art contains a number of bipolar random access memory cells varying in complexity and desirability. These cells usually consist of a pair of cross coupled transistors with load resistors in the collector circuits to form a flip flop, means for sensing the state of the flip flop, and means for writing in a desired state.
A useful memory unit contains an array of cells arranged in rows and columns, each cell in a row being connected by one or more "word lines" and each cell in a column being connected by "bit lines", usually two in number. The bit lines are coupled to the individual cell flip flops through diodes or other devices which decouple the cells from the bit lines except during the time that that particular row of cells is being interrogated. The decoupling means can either be separate devices or integral with the flip flop transistors, as for example, an additional emitter element.
As a minimum, then, prior art memory cells of the class being discussed comprise four distinct elements: a pair of transistors and two load resistors associated with the transistors. When such cell arrays are manufactured using conventional integrated circuit techniques, it is necessary that the individual circuit elements be electrically isolated in order that proper operation be achieved. The required isolation in the form of isolation barriers diffused through an epitaxial layer to a buried layer is space consuming, so that a practical memory cell occupies considerably more space than that taken by the individual devices. By using a reverse connection to the flip flop transistors, that is, by using what is normally considered to be the collector as an emitter, and vice versa, an arrangement is achieved which reduces drastically the isolation requirements of the cell and permits the cell area to be about one third of that required by the prior art.
The state of any particular cell of a memory array may be sensed by drawing current from the bit lines associated with the cell and comparing the relative levels existing on those lines to determine which of the transistors in the flip flop is in the conductive state. The amount of current which can be drawn without danger of causing the flip flop to change states is a function of, among other things, the gain of the transistors, and the value of the load resistors. Normal fabrication processes are such that those factors vary substantially from cell to cell within a unit, and also from unit to unit, with the result that the current drawn during sensing must be severly limited lest a marginal cell be inadvertently actuated during a read cycle.
Conversely, since the current required to write into a cell varies, sufficient write current must be provided to assure that the least sensitive cell changes state when desired.
Thus in prior art cells, for adequate reliability, substantially less than nominal sense current is available for sensing the cell state, and substantially more than nominal write current must be provided for writing information into the cell.
Due to the unique self compensating nature of the invented cell, the read and write currents are much more uniform so that a large margin of safety is not required, resulting in lower power requirements, higher yield, and greater reliability.
Thus, it is an object of the present invention to provide a memory cell for use in a bipolar random access memory of small size enabling the fabrication of an array of a large number of cells on one chip.
It is also an object of the present invention to provide such a cell having characteristics which are insensitive to normal process variations.
A further object of the present invention is the production of a memory cell having low power requirements.
These and many other objects and advantages of the invented memory cell and resulting memory matrix will become apparent from the detailed description of the invention to follow.